Improved VLSI interconnect

International Journal of Electronics

Volumn 86, Issue 8, 1999, Pages 957-965

  Cumming, David R S ^a,b  

^a UNIVERSITY OF CANTERBURY   (New Zealand)

^b UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; CURRENT DENSITY; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; PASSIVE NETWORKS;

METAL INTERCONNECT; TAPERED TRACK;

VLSI CIRCUITS;

EID: 0032631519     PISSN: 00207217     EISSN: 13623060     Source Type: Journal    
DOI: 10.1080/002072199132950     Document Type: Article

References (9)

1. Elmore, W. C., 1947, The transient response of damped linear networks with particular regard to wideband amplifiers. Journal of Applied Physics, 19, 55-63.
2. Glickman, E., and Nathan, M., 1996, On the unusual electromigration behavior of copper interconnects. Journal of Applied Physics, 80, 3782-3791.
3. Goel, A. K., 1994, High-Speed VLSI Interconnections. (New York: Wiley).
4. Lee, K., 1998, On-chip interconnects—gigahertz and beyond. Solid State Technology, 41, 85-89.
5. Lillis, J., Cheng, C.-K., and Lin, T-TY, 1996, Optimal wire sizing and buffer insertion for low power and a generalized delay model. IEEE Journal of Solid-State Circuits, 31, 473-447.
6. Liu, D., and Svensson, C., 1994, Power consumption estimation in CMOS VLSI chips. IEEE Journal of Solid-State Circuits, 29, 663-670.
7. Moore, G., and Korczynski, E., 1997, Moore’s Law extended: the return of cleverness. Solid State Technology, 40, 364-369.
8. Sakurai, T, andTamaru, K., 1983, Simple formulas for two- and three-dimensional capacitances. IEEE Transactions on Electron Devices, ED-30, 183-185.
9. Weste, N. H. E., and Eshraghian, K., 1993, Principles of CMOS VLSI Design. (Reading, MA: Addison-Wesley).