Investigation of MOSFET operation in bipolar mode

Microelectronics Reliability

Volumn 39, Issue 1, 1999, Pages 133-137

  Pershenkov, V S ^a   Belyakov, V V ^a   Cherepko, S V ^a   Shvetzov Shilovsky, I N ^a   Abramov, V V ^a  

^a NATIONAL RESEARCH NUCLEAR UNIVERSITY MEPHI   (Russian Federation)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; INTERFACES (MATERIALS); LOGIC DEVICES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SILICA;

LOW POWER LOGIC CIRCUITS;

MOSFET DEVICES;

EID: 0032628738     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(98)00157-7     Document Type: Article

References (7)

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2. Belyakov VV, Pershenkov VS, Shalnov AV, Shvetzov-Shilovsky IN. Use of MOS structures for the investigation of low-dose-rate effects in bipolar transistors. IEEE Trans Nucl Sci 1995;42:1660-6.
3. Vittoz EA. MOS transistors operated in the lateral bipolar mode and their application in CMOS technology. IEEE Journal of Solid-State Circuits 1983;SC-18(3):273-9.
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5. Fleetwood DM, Winokur PS, Reber RA, Jr, Meisenheimer TL, Schwank JR, Shaneyfelt MR, Riewe LS. Effect of oxide traps, interface traps, and 'border traps' on metal-oxide-semiconductor devices. J Appl Phys 1993;73(10):5058-74.
6. Groeseneken G, Maes HE, Beltran N, DeKeersmaecker R. A reliable approach to charge-pumping measurements in MOS transistors. IEEE Trans Electron Dev 1984;31:42.
7. Kavalieros JT, Sah CT. Separation of interface and non-uniform oxide traps by the DC current-voltage method. IEEE Trans Electron Dev 1996;43:137-41.