A Digitally Controlled Shunt Capacitor CMOS Delay Line

Analog Integrated Circuits and Signal Processing

Volumn 18, Issue 1, 1999, Pages 89-96

  Andreani, P ^a,b,c   Bigongiari, F ^b   Roncella, R ^b   Saletti, R ^b,d,e   Terreni, P ^b,c  

^a LUND UNIVERSITY   (Sweden)

^b UNIVERSITY OF PISA   (Italy)

^c Pisa University ^*  (Italy)

^d CNR   (Italy)

^e Department of Obstetrics Gynecology   (United States)

Author keywords

Delay lines; High speed circuits; Time to digital converters

Indexed keywords

ARRAYS; CAPACITORS; CMOS INTEGRATED CIRCUITS; DIGITAL CONTROL SYSTEMS;

CMOS DELAY LINES;

ELECTRIC DELAY LINES;

EID: 0032625762     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1008359721539     Document Type: Article

References (10)

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