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Volumn 6, Issue , 1999, Pages

Accurate modeling of simultaneous switching noise in low voltage digital VLSI

Author keywords

[No Author keywords available]

Indexed keywords

SIMULTANEOUS SWITCHING NOISE (SSN);

EID: 0032624104     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article
Times cited : (9)

References (8)
  • 4
    • 0022117244 scopus 로고
    • Delta-i noise specification for a high-performance computing machine
    • Sep.
    • George A. Katopis, "Delta-i Noise Specification for a High-performance Computing Machine", Proceedings of IEEE, pp. 1405-1415, Sep. 1985.
    • (1985) Proceedings of IEEE , pp. 1405-1415
    • Katopis, G.A.1
  • 5
    • 0026258666 scopus 로고
    • Simultaneous switching ground noise calculation for packaged CMOS devices
    • Nov.
    • R. Senthinathan and J.L. Prince, "Simultaneous Switching Ground Noise Calculation for Packaged CMOS Devices", IEEE Journal of Solid-State Circuits, pp. 724-1728, Nov. 1991.
    • (1991) IEEE Journal of Solid-State Circuits , pp. 724-1728
    • Senthinathan, R.1    Prince, J.L.2
  • 6
    • 0016498379 scopus 로고
    • An optimized output stage for mos integrated circuits
    • Apr.
    • H.C. Lin and L.W. Linholm, "An Optimized Output Stage for MOS Integrated Circuits", IEEE Journal of Solid-State Circuits, pp. 106-109, Apr. 1975.
    • (1975) IEEE Journal of Solid-State Circuits , pp. 106-109
    • Lin, H.C.1    Linholm, L.W.2
  • 7
    • 0025415048 scopus 로고
    • Alpha-power law MOS-FET model and its applications to CMOS inverter de-lay and other formulas
    • Apr.
    • T. Sakurai and A. Newton, "Alpha-power law MOS-FET model and its applications to CMOS inverter de-lay and other formulas", IEEE Journal of Solid-State Circuits, pp. 584-594, Apr. 1990.
    • (1990) IEEE Journal of Solid-State Circuits , pp. 584-594
    • Sakurai, T.1    Newton, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.