Performance analysis of lookahead scheduling algorithm for input-buffered packet switches

IEICE Transactions on Communications

Volumn E82-B, Issue 8, 1999, Pages 1296-1303

  Yeung, Kwan L ^a   Shi, Hai ^a   Liu, Ngai Han ^a  

^a CITY UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Head of line blocking; Input buffered switch; Packet scheduling algorithm

Indexed keywords

ALGORITHMS; MATHEMATICAL MODELS; OPTICAL SWITCHES; PACKET SWITCHING;

INPUT BUFFERED SWITCHES; LOOKAHEAD SCHEDULING ALGORITHM; PACKET SCHEDULING ALGORITHM;

OPTICAL COMMUNICATION EQUIPMENT;

EID: 0032596337     PISSN: 09168516     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (23)

1. M. de Prycker, Asynchronous Transfer Mode Solution for Broadband ISDN, Ellis Horwood, 1993.
2. U. Black, ATM: Foundation For Broadband Networks, Prentice Hall, 1993.
3. M. Karol, M. Hluchyj, and S. Morgan, "Input versus out-put queuing on a space division switch," IEEE Trans. Commun., vol.35, pp.1347-1356, Dec. 1987.
4. M. Chen, N. Georganas, and O. Yang, "A fast algorithm for multi-channel/port traffic assignment," Proc. IEEE ICC '94, pp.96-100, 1994.
5. J. Choi and C. Un, "A nonblocking ATM switch with a single plane or multiple planes combined with a window scheme," Proc. IEEE ICC' 96, pp.1680-1684, Nov. 1996.
6. C. Kolias and L. Kleinrock, "The odd-even queueing ATM switch: Performance evaluation," Proc. IEEE ICC '96, pp.1674-1679, 1996.
7. C. Kolias and L. Kleinrock, "Throughput analysis of multiple input-queueing in ATM switches," Broadband Communications '96, April 1996.
8. Y. Tamir and G. Frazier, "High performance multi-queue buffers for VLSI communication switches," Proc. 15th Ann. Symp. Comp. Arch., pp.343-354, June 1988.
9. M. Mehmet-Ali, M. Youssefi, and H. Nguyen, "The performance analysis and implementation of an input access scheme in a high-speed packet switch," IEEE Trans. Commun., vol.42, 1994.
10. T. Brown and K. Liu, "Neural network design of a banyan network controller," IEEE J. Select. Areas Commun., vol.8, pp.1289-1298, Oct. 1990.
11. Y. Leung, "Neural scheduling algorithms for time-multiplex switches," IEEE J. Select. Areas Commun., vol.12, no.9, pp.1481-1487, Dec. 1994.
12. M. Chen and T.S. Yum, "A conflict-free protocol for optical WDMA networks," Proc. IEEE GLOBECOM '91, pp.1276-1281, 1991.
13. N. McKeown, "Scheduling algorithms for input-queued cell switches," Ph.D. Thesis, University of California at Berkeley, 1995.
14. N. McKeown, V. Anantharam, and J. Walrand, "Scheduling cells in an input-queued switch," IEE Elect. Lett., Dec. 1993.
15. V. Yau and K. Pawlikowski, "A conflict-free traffic assignment algorithm using forward planning," Proc. IEEE INFOCOM '96, pp.1277-1284, 1996.
16. T. Inukai, "An efficient SS/TDMA time slot assignment algorithm," IEEE Trans. Commun., vol.COM-27, no.10, pp.1449-1455, Oct. 1979.
17. Y. Ito, Y. Urano, T. Muratani, and M. Yamaguchi, "Analysis of a switch matrix for an SS/TDMA system," IEEE Trans. Commun., vol.65, no.3, pp.411-419, March 1977.
18. M. Chen and T.S. Yum, "Buffer sharing in conflict-free WDMA networks," Proc. IEEE GLOBECOM '94, pp.96-100, 1994.
19. R. Chipalkatti, Z. Zhang, and A.S. Acampora, "High speed communication protocols for optical star coupler using WDM," Proc. IEEE INFOCOM '92, pp.2124-2133, 1992.
20. A. Huang and S. Knauer, "Starlite: A wideband digital switch," Proc. IEEE GLOBECOM '84, pp.121-125, 1984.
21. M. Karol and M. Hluchyj, "Queueing in high-performance packet-switching," IEEE J. Selected Areas Commun., vol.6, pp.1587-1597, Dec. 1988.
22. H. Yamanaka, et al., "Scalable shared-buffering ATM switch with a versatile searchable queue," IEEE J. Select. Areas Commun., vol.15, no.5, pp.773-784, June 1997.
23. M. Hashemi and A. Leon-Garcia, "The single-queue switch: A building block for switches with programmable scheduling," IEEE J. Select. Areas Commun., vol.15, no.5, pp.785-794, June 1997.