Power analysis of DRAMs

Proceedings of the Asian Test Symposium

Volumn , Issue , 1998, Pages 334-339

  Vollrath, Joerg ^a   Huebl, Markus ^a   Stahl, Ernst ^a  

^a SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

POWER ANALYSIS;

CAPACITANCE; ELECTRIC CURRENT MEASUREMENT; ELECTRIC NETWORK ANALYSIS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0032303744     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Furuyama, T et al. (1986) An Experimental 4-Mbit CMOS DRAM, IEEE Journal of Solid State Circuits, Vol. Sc-21, No. 5, October 1986, p. 605 (Toshiba voltage regulator)
2. Nakagome, Y et al. (1991) An experimental 1,5V 64MB DRAM, IEEE Journal of Solid state circuits, SC-26, No. 4, April 1991, p. 465 (Hitachi)
3. Siemens Memory Components Data Book
4. T. Kirihata et al. Flexible test Mode Approach for 256 MB DRAM, IEEE Journal of Solid state circuits, Vol. 32, No. 10, October 1997, p. 1525-1534