Computer program that generates an electrical circuit model of the chip scale BGA

Microelectronics Journal

Volumn 29, Issue 12, 1998, Pages 1013-1024

  Caggiano, M F ^a   Brush, R M ^a   Kleban, J T ^a   Chuaypradit, P J ^a  

^a RUTGERS UNIVERSITY   (United States)

Author keywords

Chip scale BGA; Electrical; Modeling

Indexed keywords

COMPUTER SOFTWARE; COMPUTER WORKSTATIONS; DATA PROCESSING; ELECTRIC NETWORK SYNTHESIS; ELECTRONICS PACKAGING; PERSONAL COMPUTERS; SEMICONDUCTOR DEVICE MODELS;

CHIP SCALE BALL GRID ARRAYS (BGA);

MICROPROCESSOR CHIPS;

EID: 0032303610     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0026-2692(98)00074-3     Document Type: Article

References (6)

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2. M.F. Caggiano, RF electrical measurements comparisons of a 64 TQFP with a computer generated model, Applied Microwave and Wireless 9 (4) (1997) 24-36.
3. M.F. Caggiano, A PC program that generates a model of the parasitics for BGA packages, in: Proceedings IEEE 45th Electronic Components and Technology Conference, Vol. 1, 1995, pp. 959-963.
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