Optimal two-level unequal error control codes for computer systems

IEEE Transactions on Computers

Volumn 47, Issue 12, 1998, Pages 1313-1325

  Fujiwara, Eiji ^a,b   Ritthongpitak, Tepparit ^c   Kitakami, Masato ^a,b  

^a IEEE

^b Tokyo Institute of Technology ^*  (Japan)

^c Siam Information and Processing Co Ltd ^*  (Thailand)

Author keywords

(Fb+S)EC code; FbEC SEC code; FbeC SEC DED code; Fixed byte; Two level UEC code; Unequal error control (UEC) codes

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; COMPUTER SYSTEMS; DATA COMMUNICATION SYSTEMS; DATABASE SYSTEMS; DECODING; ERROR CORRECTION; ERROR DETECTION;

ERROR CONTROL CODES; UNEQUAL ERROR CONTROL;

CODES (SYMBOLS);

EID: 0032302132     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.737679     Document Type: Article

References (6)

1. T.R.N. Rao and E. Fujiwara, Error Control Coding for Computer Systems. Prentice Hall, 1989.
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3. R.H. Morelos-Zaragoza and S. Lin, "On a Class of Optimal Non-binary Linear Unequal-Error-Protection Codes for Two Sets of Messages," IEEE Trans. Information Theory, vol. 40, no. 1, pp. 196-200, Jan. 1994.
4. J.C. Lo, M. Kitakami, and E. Fujiwara, "Reliable Logic Circuits with Byte Error Control Codes - A Feasibility Study," Proc. IEEE Int'l Symp. Defect and Fault Tolerance in VLSI Systems, pp. 286-294, Nov. 1996.
5. E. Fujiwara and M. Kitakami, "A Class of Optimal Fixed-Byte Error Protection Codes for Computer Systems," Digest IEEE Int'l Symp. Fault-Tolerant Computing, pp. 310-319, June 1995.
6. T. Ritthongpitak, M. Kitakami, and E. Fujiwara, "Optimal Two-Level Unequal Error Control Codes for Computer Systems," Digest IEEE Int'l Symp. Fault-Tolerant Computing, pp. 190-199, June 1996.