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Volumn , Issue , 1998, Pages 360-365

Dynamic test set generation for analog circuits and systems

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS;

EID: 0032296107     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (8)
  • 1
    • 0029516733 scopus 로고
    • Dynamic test signal design for analog ICs
    • G. Devarayanadurg and M. Soma, "Dynamic Test Signal Design for Analog ICs," Proc. of lCCAD, pp. 627-629, 1995.
    • (1995) Proc. of LCCAD , pp. 627-629
    • Devarayanadurg, G.1    Soma, M.2
  • 4
    • 0028734143 scopus 로고
    • Multifrequency testability analysis for analog circuits
    • M. Slamani and B. Kaminska, "Multifrequency Testability Analysis for Analog Circuits," Proc. of the VTS, pp. 54-59, 1994.
    • (1994) Proc. of the VTS , pp. 54-59
    • Slamani, M.1    Kaminska, B.2
  • 5
    • 0027831832 scopus 로고
    • Fault-based automatic test generator for linear analog circuits
    • N. Nagi and J. A. Abraham, "Fault-based Automatic Test Generator for Linear Analog Circuits," Proc. of ICCAD, pp. 88-91, 1993.
    • (1993) Proc. of ICCAD , pp. 88-91
    • Nagi, N.1    Abraham, J.A.2
  • 6
    • 0024612038 scopus 로고
    • Detection of catastrophic faults in analog integrated circuits
    • February
    • L. Milor and V. Visvanathan, "Detection of Catastrophic Faults in Analog Integrated Circuits," IEEE Trans. CAD, vol. CAD-8, no. 2, pp. 114-130, February 1989.
    • (1989) IEEE Trans. CAD , vol.CAD-8 , Issue.2 , pp. 114-130
    • Milor, L.1    Visvanathan, V.2
  • 7
    • 13244280756 scopus 로고
    • A testability measure for register transfer level digital circuits
    • J. E. Stephenson and J. Grason, "A Testability Measure for Register Transfer Level Digital Circuits," IEEE Fault-Tolerant Computing, pp. 101-107, 1976.
    • (1976) IEEE Fault-Tolerant Computing , pp. 101-107
    • Stephenson, J.E.1    Grason, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.