Low-voltage CMOS four-quadrant analogue multiplier for RF applications

Electronics Letters

Volumn 34, Issue 24, 1998, Pages 2285-2286

  Debono, C J ^a   Maloberti, F ^a   Micallef, J ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b UNIVERSITY OF MALTA   (Malta)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC POTENTIAL; MOSFET DEVICES;

ANALOG MULTIPLIER; SATURATION REGION;

MULTIPLYING CIRCUITS;

EID: 0032202438     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19981632     Document Type: Article

References (5)

1. KARANICOLAS, A.N.: 'A 2.7V 900MHz CMOS LNA and mixer', IEEE J. Solid-State Circuits, 1996, SC-31, (12), pp. 1939-1944
2. KINGET, R., and STEYAERT, M.S.J.: 'A 1GHz CMOS up-conversion mixer', IEEE J. Solid-State Circuits, 1997, SC-32, (3), pp. 370-376
3. BORRENANS, M.A.F., and STEYAERT, M.S.J.: 'A 2V, low distortion, 1 GHz CMOS up-conversion mixer', IEEE J. Solid-State Circuits, 1998, SC-33, (3). pp. 359-366
4. HSIAO. S., and WU, C.: 'A 1.2V CMOS four-quadrant analog multiplier'. Proc. IEEE Int. Symp. on Circuits and Systems, Hong Kong, June 1997, pp. 241-244
5. HSIAO, S., and WU, C.: 'A parallel structure for CMOS four-quadrant analog multipliers and its application to a 2GHz RF down-conversion mixer', IEEE J. Solid-State Circuits, 1998, SC-33, (6), pp. 859-869