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Volumn 49, Issue 3, 1998, Pages 39-44

On-chip cross talk noise model for deep-submicrometer ULSI interconnect

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER SIMULATION; CROSSTALK; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; ULSI CIRCUITS;

EID: 0032142155     PISSN: 00181153     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (47)

References (9)
  • 4
    • 0027222295 scopus 로고
    • Closed-form expression for interconnection delay, coupling, and cross talk in VLSIs
    • T. Sakurai, "Closed-form expression for interconnection delay, coupling, and cross talk in VLSIs," IEEE Transactions on Electron Devices, Vol. 40, 1993, pp. 118-124.
    • (1993) IEEE Transactions on Electron Devices , vol.40 , pp. 118-124
    • Sakurai, T.1
  • 9
    • 0025415048 scopus 로고
    • Alpha-power-law MOSFET model and its applications to CMOS inverter delay and other formulas
    • T. Sakurai and R. Newton, "Alpha-power-law MOSFET model and its applications to CMOS inverter delay and other formulas," IEEE Journal of Solid-State Circuits, Vol. 25, 1990, pp. 584-593.
    • (1990) IEEE Journal of Solid-state Circuits , vol.25 , pp. 584-593
    • Sakurai, T.1    Newton, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.