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Volumn 21, Issue 3, 1998, Pages 241-249
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A technique for fast calculation of capacitance matrices of interconnect structures
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Author keywords
Capacitance extraction; Difference method; Finite on chip interconnects; Perfectly matched layers
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Indexed keywords
BOUNDARY CONDITIONS;
CAPACITANCE;
FINITE DIFFERENCE METHOD;
CAPACITANCE MATRICES;
PERFECTLY MATCHED LAYERS (PML);
ELECTRONICS PACKAGING;
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EID: 0032140326
PISSN: 10709894
EISSN: None
Source Type: Journal
DOI: 10.1109/96.704934 Document Type: Article |
Times cited : (12)
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References (8)
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