On the power dissipation in dynamic threshold silicon-on-insulator CMOS inverter

IEEE Transactions on Electron Devices

Volumn 45, Issue 8, 1998, Pages 1717-1724

  Jin, Wei ^a,b   Chan, Philip C H ^a,b   Chan, Mansun ^a,b  

^a IEEE   (Hong Kong)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Dynamic threshold voltage mosfet (dtmos); Power dissipation; Silicon on insulator (soi)

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; ENERGY DISSIPATION; MOSFET DEVICES;

DYNAMIC THRESHOLD SILICON ON INSULATOR CMOS INVERTER; GATE DELAY; POWER DISSIPATION;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0032138736     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.704370     Document Type: Article

References (8)

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