Characterization of crosstalk noise in submicron CMOS integrated circuits: An experimental view

IEEE Transactions on Electromagnetic Compatibility

Volumn 40, Issue 3, 1998, Pages 271-280

  Fourniols, Jean Yves ^a   Roca, Miquel ^b   Caignet, Fabrice ^c   Sicard, Etienne ^c  

^a LAAS CNRS   (France)

^b UNIVERSITAT DE LES ILLES BALEARS   (Spain)

^c INSA   (France)

Author keywords

Crosstalk; Integrated circuits noise; Interconnections; Noise measurement

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; SPURIOUS SIGNAL NOISE;

NOISE MEASUREMENT;

ELECTROMAGNETIC COMPATIBILITY;

EID: 0032135896     PISSN: 00189375     EISSN: None     Source Type: Journal    
DOI: 10.1109/15.709426     Document Type: Review

References (20)

1. E. R. Hnatek, Integrated Circuit Quality and Reliability New York: Marcel Dekker, 1995.
2. B. CourtoisCAD and testing, where we are going? J. Microelectron. Syst. Integration, vol. 2, no. 3, pp. 5-21, 1994.
3. J. Banik, K. L. Wong, G. L. Geannopoulos, and C. Y. J. YipA high performance 0.35-μm 3.3 V BiCM OS technology optimized for product porting from 0.6-μm 3.3 V BiCM OS technology IEEE J. Solid-State Circuits, vol. 31, pp. 1437-1442, Oct. 1996.
4. M. Roca, F. Moll, and A. RubioCrosstalk effects between metal and polisilycon lines in CMOS integrated circuits IEEE Trans. Electromagn. Compat., vol. 36, pp. 250-253, Aug. 1994.
5. D. Hill, K. Caucey, and R. JohnkCrosstalk between microstrip transmission lines IEEE Trans. Electromagn. Compat., vol. 36 pp. 314-321, Nov. 1994.
6. M. NaklaSimulation and optimization of interconnection delay and crosstalk in multichip modules IEEE Multichip Module Conf., Santa Cruz, CA, Mar. 1992, pp. 56-59.
7. F. Moll, M. Roca, and A. RubioAnalysis of parasitic coupling in distributed parameter lines Proc. Conf. Power Timing Modeling Performance Integrated Circuits (PATMOS), Montpellier, France, Oct. 1993, pp. 175-183.
8. H. Bakoglu, Circuits, Interconnection and Packaging for VLSIReading, MA: Addison-Wesley, 1990.
9. N. Delorme, M. Belleville, and J. ChiloInductance and capacitance analytic formulas for VLSI interconnects Electron. Lett., vol. 32, no. 11, pp. 996-997, May 1996.
10. T. SakuraiClosed-form expressions for interconnection delay, coupling, and crosstalk in VLSI's IEEE Trans. Electron Devices, vol. 40, pp. 1277-1282, Jan. 1993.
11. X. Aragones, F. Moll, M. Roca, and A. RubioAnalysis and modeling of parasitic substrate coupling in CMOS circuits Proc. Inst. Elect. Eng. Proc. Circuits Devices Syst., vol. 142, pt. G, no. 5, pp. 307-312, Oct. 1995.
12. A. K. Goel and M. K. MathurModeling of propagation delays in the bilevel crossing interconnections on the GaAs-based integrated circuits Inst. Elect. Eng. Proc. Circuits Devices Syst., June 1994, vol. 141, pp. 185-192.
13. N. Orhanovic, P. Wang, and K. TripathiTime-domain simulation of uniform and nonuniform multiconductor lossy lines by the method of characteristics IEEE Trans. Comput.-Aided Design Integrated Circuits Syst., vol. 12, pp. 900-904, June 1993.
14. K. JoardarA simple approach to modeling crosstalk in integrated circuits IEEE J. Solid-State Circuits, vol. 29, pp. 1212-1219, Oct. 1994.
15. T. Hameenanttila, J. D. Carothers, and D. LiFast coupled noise estimation for crosstalk avoidance in the MCG multichip module autorouter IEEE Trans. Very Large Scale Integration Syst., vol. 4, pp. 356-368, Sept. 1996.
16. M. Roca, F. Moll, and A. RubioElectric design rules for avoiding crosstalk in microelectronic circuits Proc. Conf. Power Timing Modeling Performance Integrated Circuits(PATMOS), Barcelona, Spain, Oct. 1994, pp. 76-83.
17. J. CartrysseMeasured distortion of the output-waveform of an integrated opamp due to substrate noise IEEE Trans. Electromagn. Compat., vol. 37, pp. 310-312, May 1995.
18. J. Cartrysse, A. Sinnaeve, and G. VandecasteleMeasured crosstalk on chips using specially designed components IEEE Trans. Electromagn. Compat., vol. 37, pp. 313-315, May 1995.
19. D. Nayak, L. T. Hwang, and I. TurlikCalculation of electrical parameters of a thin-film multichip package IEEE Trans. Components, Hybrids, Manuf. Technol., vol. 12, pp. 303-309, June 1989.
20. Technology Modeling Associates, Inc. TMA RAPHAEL Interconnect Analysis Program, 1993.