Classical Conditioning with Pulsed Integrated Neural Networks: Circuits and System

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 6, 1998, Pages 720-728

  Lehmann, Torsten ^a,b,c  

^a IEEE   (Denmark)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

^c TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

Author keywords

Analog vlsi; Classical conditioning; Drive reinforcement; Integrated neural networks; Mixed analog digital; On chip learning, pulse stream; Temporal classification

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT; LEARNING ALGORITHMS; LEARNING SYSTEMS; LINEAR INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; VLSI CIRCUITS;

ONCHIP LEARNING; PULSED INTEGRATED NEURAL NETWORKS; TEMPORAL DIFFERENTIAL HEBBIAN LEARNING ALGORITHM;

NEURAL NETWORKS;

EID: 0032097267     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.686691     Document Type: Article

References (35)

1. A. F. Murray, Ed., Applications of Neural Networks. London, U.K.: Kluwer, 1995.
2. E. Sánchez-Sinencio and C. Lau, Artificial Neural Networks. New York: IEEE Press, 1992.
3. J. Hertz, A. Krogh, and R. G. Palmer, Introduction to the Theory of Neural Computation. Redwood City, CA: Addison-Wesley, 1991.
4. D. S. Levine, Introduction to Neural and Cognitive Modeling. London, U.K.: Lawrence Erlbaum, 1991.
5. C. M. Bishop, Neural Networks for Pattern Recognition. Oxford, U.K.: Oxford Univ. Press, 1995.
6. C. S. Lindsey and T. Lindblad, "Review of hardware neural networks: A user's perspective," in 2nd Workshop Neural Networks: From Biology to High Energy Physics, Isola d'Elba, Italy, 1994, p. 10.
7. E. A. Vittoz, "Analog VLSI signal-processing - Why, where, and how," Analog Integrated Circuits Signal Processing, vol. 6, no. 1, pp. 27-44, 1994.
8. C. Mead, Analog VLSI & Neural Systems. Reading, MA: Addison-Wesley, 1989.
9. M. Zaghloul, J. L. Meador, and R. W. Newcomb, Eds., Silicon Implementation of Pulse Coded Neural Networks. London, U.K.: Kluwer, 1994.
10. T. Shima, T. Kimura, Y. Kamatani, T. Itakura, Y. Fujita, and T. Iida, "Neuro chips with on-chip back-propagation and/or Hebbian learning," IEEE J. Solid-State Circuits, vol. 27, pp. 1868-1876, Dec. 1992.
11. Y. Arima, M. Murasaki, T. Yamada, A. Maeda, and H. Shinohara, "A refreshable analog VLSI neural network chip with 400 neurons and 40k synapses," IEEE J. Solid-State Circuits, vol. 27, pp. 1854-1867, Dec. 1992.
12. T. Morie and Y. Amemiya, "An all-analog expandable neural network LSI with on-chip backpropagation learning," IEEE J. Solid-State Circuits, vol. 29, pp. 1086-1093, Sept. 1994.
13. D. Badoni, S. Bertazzoni, S. Buglioni, G. Salina, D. J. Amit, and S. Fusi, "Electronic implementation of an analog attractor neural-network with stochastic learning," Network-Computation in Neural Syst., vol. 6, no. 2, pp. 125-157, 1995.
14. M. W. Mount and A. P. Papliński, "Modelling realistic neural systems with a biologically-motivated neural processor chip," in Int. Conf. Signal Processing Appl. Technol., Santa Clara, CA, 1996, p. +5.
15. E. A. Vittoz and X. Arreguit, "Systems based on bio-inspired analog VLSI," in 5th Int. Conf. Microelectron. for Neural Networks and Fuzzy Syst., 1996, tutorial notes.
16. R. Woodburn and C. Collin, "Modelling neurobiology in analogue VLSI: Pulse-stream techniques and neuromorphisms," Dept. Elect. Eng., 1996, preprint.
17. L. Merlat, N. Silvestre, and J. Merckle, "A hindmarsh and rose-based electronic burster," in 5th Int. Conf. Microelectron. for Neural Networks and Fuzzy Syst., Lausanne, Switzerland, 1996, pp. 39-44.
18. J. G. Elias and D. P. M. Northmore, "Switched-capacitor neuromorphs with wide-range variable dynamics," IEEE Trans. Neural Networks, vol. 6, pp. 1542-1548, Nov. 1995.
19. A. F. Murray, D. D. Corso, and L. Tarassenko, "Pulse-stream VLSI neural networks mixing analog and digital techniques," IEEE Trans. Neural Networks, vol. 2, pp. 193-204, Mar. 1991.
20. E. Vittoz, H. Oguey, M. A. Maher, O. Nys, E. Dukstra, and M. Chevroulet, "Analog storage of adjustable synaptic weights," in VLSI Design of Neural Networks, U. Ramacher and U. Rückert, Eds. Norwell, MA: Kluwer, 1991, pp. 48-63.
21. T. Lehmann, E. Bruun, and C. Dietrich, "Mixed analog/digital matrix-vector multiplier for neural network synapses," Analog Integrated Circuits Signal Processing, vol. 9, pp. 55-63, Jan. 1996.
22. A. J. Montalvo, R. S. Gyurcsik, and J. J. Paulos, "Building blocks for a temperature-compensated analog VLSI neural network with on-chip learning," in IEEE Int. Symp. Circuits Syst, 1994, vol. 6, pp. 329-332.
23. D. J. Amit and S. Fusi, "Learning in neural networks with material synapses," Neural Computation, vol. 6, no. 5, pp. 957-982, 1994.
24. A. J. Montalvo, P. W. Hollis, and J. J. Paulos, "On-chip learning in the analog domain with limited precision circuits," in Int. Symp. Circuits Syst, 1992, pp. I-196-I-201.
25. T. Lehmann, "Hardware learning in analogue VLSI neural networks," Ph.D. dissertation, Electronics Inst., Technical Univ. Denmark, Lyngby, 1994.
26. M. Jabri and B. Flower, "Weight perturbation: An optimal architecture and learning technique for analog VLSI feedforward and recurrent multilayer networks," IEEE Trans. Neural Networks, vol. 3, pp. 154-157, Jan. 1992.
27. S. Porsgaard, "Democracy in neural networks" (in Danish), Master's thesis, Electronics Inst., Technical Univ. Denmark, Lyngby, 1994.
28. U. Ramacher and P. Schildberg, "Recent developments in neurodynamics and their impact on the design of neuro-chips," Int. J. Neural Syst., vol. 4, no. 4, pp. 309-316, 1993.
29. P. Shah, "Design of analogue integrated circuits for very low frequency signal processing," Ph.D. dissertation, Electronics Inst., Technical Univ. Denmark, Lyngby, 1993.
30. T. Lehmann, R. Woodburn, and A. F. Murray, "On-chip learning in pulsed silicon neural networks," in IEEE Int. Symp. Circuits Syst., Hong Kong, 1997, pp. 693-696, Invited Paper.
31. A. H. Klopf, "A neuronal model of classical-conditioning," Psychobiol., vol. 16, no. 2, pp. 85-125, 1988.
32. J. S. Morgan, E. C. Patterson, and A. H. Klopf, "A drive-reinforcement neural network model of simple instrumental conditioning," in Int. Joint Conf. Neural Networks, IEEE, San Diego, CA, 1990, pp. 227-232.
33. M. Gluck, D. B. Parker, and E. S. Reifsnider, "Learning with temporal derivatives in pulse-coded neuronal systems," in 1988 IEEE Conf. Neural Inform. Processing Syst., D. S. Touretzky, Ed. Denver, CO: Morgan Kaufmann, 1989, vol. 1, pp. 195-203.
34. T. Lehmann, "Teaching pulsed integrated neural systems: A psychobiological approach," in 5th Int. Conf. Microelectron. for Neural Networks and Fuzzy Syst., Lausanne, Switzerland, 1996, pp. 185-190.
35. "Eccopunch: Algorithms, circuits and systems; Design and evaluation," Integrated Syst. Group, Dept. Elect. Eng., University of Edinburgh, Scotland, Tech. Rep., 1996.