Designing for a gigahertz

IEEE Micro

Volumn 18, Issue 3, 1998, Pages 66-73

  Hofstee, H Peter ^a,b,c,d,e   Dhong, Sang H ^a,b,e,f   Meltzer, David ^a,g   Nowka, Kevin J ^a   Silberman, Joel A ^a   Burns, Jeffrey L ^a   Posluszny, Stephen D ^a   Takahashi, Osamu ^a  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

^b High Performance VLSI Group

^c UNIVERSITY OF GRONINGEN   (Netherlands)

^d CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

^e IEEE

^f UNIVERSITY OF CALIFORNIA   (United States)

^g IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; REDUCED INSTRUCTION SET COMPUTING;

CIRCUIT CENTRIC DESIGNS;

MICROPROCESSOR CHIPS;

EID: 0032070770     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.683106     Document Type: Article

References (11)

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2. J. Silberman et al., "A 1.0 GHz Single-Issue 64b PowerPC Integer Processor," IEEE Int'l Solid-State Circuits Conf., 1998 Digest of Tech. Papers, IEEE Press, Piscataway, N.J., 1998, pp. 230-231; also J. Solid-State Circuits, to appear Nov. 1998.
3. J. Burns and K. Nowka, "Parallel Condition-Code Generation for High-Frequency Power PC Microprocessors," Proc. 1998 Symp. VLSI Circuits, IEEE Computer Society Press, Los Alamitos, Calif., to appear June 1998.
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7. J. Cortadella and J. Llaberia, "Evaluation of A+B=K Conditions Without Carry Propagation," IEEE Trans. Computers, Vol. 41, Nov. 1992, pp. 1484-1487.
8. A. Kuehlmann, A. Srinivasan, and D.P. LaPotin, "Verity: A Formal Verification Program for Custom CMOS Circuits," IBM J. Research and Development, Vol. 39, Jan./Mar. 1995, pp. 149-165.
9. S. Posluszny et al., "Design Methodology for a 1.0 GHz Microprocessor," Proc. Int'l Conf. Computer Design 98, IEEE CS Press, to appear Oct. 1998.
10. K. Shepard and V. Narayanan, "Conquering Noise in Deep-Submicron Digital ICs," IEEE Design & Test of Computers, Jan.-Mar. 1998, pp. 51-62.
11. K. Nowka and T. Galambos, "Circuit Design Techniques for a Gigahertz Integer Microprocessor," Proc. Int'l Conf. Computer Design 98, to appear Oct. 1998.