Is interconnect the weak link? Estimating wiring requirements of future-generation devices to meet NTRS needs

IEEE Circuits and Devices Magazine

Volumn 14, Issue 2, 1998, Pages 30-36

  Davis, Jeffrey A ^a   Meindl, James D ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC WIRING; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; MICROPROCESSOR CHIPS; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS; TRANSISTORS;

GIGASCALE INTEGRATION (GSI) SYSTEMS; RENT'S RULE;

INTERCONNECTION NETWORKS;

EID: 0032022713     PISSN: 87553996     EISSN: None     Source Type: Journal    
DOI: 10.1109/101.666589     Document Type: Article

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