Design and Performance of a Low-Noise, Low-Power Consumption CMOS Charge Amplifier for Capacitive Detectors

IEEE Transactions on Nuclear Science

Volumn 45, Issue 1, 1998, Pages 119-123

  Hu, Y ^a,b   Solere J L ^a,b   Lachartre, D ^a,b   Turchetta, R ^a,b  

^a CENTRE DE CALCUL DE L INSTITUT NATIONAL DE PHYSIQUE NUCLEAIRE ET DE PHYSIQUE DES PARTICULES   (France)

^b CEA SACLAY   (France)

Author keywords

Low voltage; Low noise amplifiers; Low power design

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIPOLAR INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; READOUT SYSTEMS; SILICON ON INSULATOR TECHNOLOGY; SILICON SENSORS; SPURIOUS SIGNAL NOISE;

CAPACITIVE DETECTORS; CHARGE AMPLIFIERS;

PARTICLE DETECTORS;

EID: 0032000802     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.659562     Document Type: Article

References (6)

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