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Implementation of PRML in a Rigid Disk Drive
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A 72Mb/s PRML Disk-Drive Channel Chip with an Analog Sampled-Data Signal Processor
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Maximum-likelihood sequence estimation of digital sequences in the presence of intersymbol interference
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An EPRML Digital Read/Write Channel IC
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A 200Mb/s CMOS EPRML Channel with Integrated Servo Demodulator for Magnetic Hard Disks
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A 1,7 Code EEPR4 Read Channel IC with an Analog Noise Whitened Detector
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Adaptive Continuous-Time Equalization Followed by FDTS/DF Sequence Detection
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K. Bracken and L. R. Carley, "Adaptive Continuous-Time Equalization Followed by FDTS/DF Sequence Detection," IEEE Transactions on Magnetics, Vol. 31, No. 2, pp. 1089-1094, March 1995.
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Architecture for a Generalized Pipelined Viterbi Detector Based on Table Look-Up
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