EPRML digital read/write channel IC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 320-321

  Chern, Jenn Gang ^a   Conroy, Cormac ^a   Contreras, Richard ^a   Lai, Paul ^a   Moser, Larry ^a   Pan, Tzuwang ^a   Rae, Jim ^a   Shih, Shih, Ming ^a   Si, Xiomin ^a   Thapar, Hemant ^a   Tierney, Jerry ^a   Yeung, Alfred ^a   Sugawara, Mitsutoshi ^a   Tamura, Yoshiyuki ^a  

^a Datapath Systems Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANALOG TO DIGITAL CONVERSION; BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; DEMODULATION; DIGITAL FILTERS; EQUALIZERS; GAIN CONTROL; SIGNAL TO NOISE RATIO; VARIABLE FREQUENCY OSCILLATORS;

EXTENDED PARTIAL RESPONSE (EPR) SIGNALING; SYNTHESIZERS; VARIABLE GAIN AMPLIFIERS (VGA);

MAGNETIC RECORDING;

EID: 0031070303     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)