-
3
-
-
0030286092
-
Request resubmission in a blocking, circuit-switched interconnection network
-
November
-
P. Dietrich and R. R. Rao. Request resubmission in a blocking, circuit-switched interconnection network. IEEE Transactions on Computers, 4S(11): 1282-1293,November 1996.
-
(1996)
IEEE Transactions on Computers
, vol.4 S
, Issue.11
, pp. 1282-1293
-
-
Dietrich, P.1
Rao, R.R.2
-
5
-
-
0020894692
-
The performance of Inultistage interconnection networks for multiprocessors
-
December
-
C. P. Kruskal and M. Snir. The performance of Inultistage interconnection networks for multiprocessors. IEEE Transactions on Computers, C-32( 12): 1091-1098, December 1983.
-
(1983)
IEEE Transactions on Computers
, vol.C-32
, Issue.12
, pp. 1091-1098
-
-
Kruskal, C.P.1
Snir, M.2
-
6
-
-
0030871480
-
The Tiny Tera: A packet switch core
-
Jan/Feb
-
N. McKeown, M. Izzard, A. Mekkittikul, W. Ellersick, and M. Horowitz. The Tiny Tera: A packet switch core. IEEE Micro, pages 26-33, Jan/Feb 1997.
-
(1997)
IEEE Micro
, pp. 26-33
-
-
McKeown, N.1
Izzard, M.2
Mekkittikul, A.3
Ellersick, W.4
Horowitz, M.5
-
7
-
-
0028416281
-
Reconfiguration with time division multiplexing MINs for multiprocessor communications
-
C. Qiao and R. Melhem. Reconfiguration with time division multiplexing MINs for multiprocessor communications. IEEE Transactions oii Parallel and Distributed Systems, 5(4):337-352,1994.
-
(1994)
IEEE Transactions Oii Parallel and Distributed Systems
, vol.5
, Issue.4
, pp. 337-352
-
-
Qiao, C.1
Melhem, R.2
-
9
-
-
0025211581
-
Fast packet switch architectures for broadband integrated services digital networks
-
January
-
E A. Tobagi. Fast packet switch architectures for broadband integrated services digital networks. Proceedings of the IEEE, 78(1):133-167, January 1990.
-
(1990)
Proceedings of the IEEE
, vol.78
, Issue.1
, pp. 133-167
-
-
Tobagi, E.A.1
-
10
-
-
0026240487
-
Architecture, perfonnance, and implementation of the tandem banyan fast packet switch
-
October
-
E A. Tobagi, T. Kwok, and EM. Chiussi. Architecture, perfonnance, and implementation of the tandem banyan fast packet switch. IEEE Journal on Selected Areas in Communications, 9(8):1173-1193, October 1991.
-
(1991)
IEEE Journal on Selected Areas in Communications
, vol.9
, Issue.8
, pp. 1173-1193
-
-
Tobagi, E.A.1
Kwok, T.2
Chiussi, E.M.3
-
11
-
-
0024123761
-
Architecture of a packet switch based on banyan switching network with feedback loops
-
December
-
H. Uernatsu and R. Watanabe. Architecture of a packet switch based on banyan switching network with feedback loops. IEEE Journal on Selected Areas in Communications, 6(9): 1521-1527, December 1988.
-
(1988)
IEEE Journal on Selected Areas in Communications
, vol.6
, Issue.9
, pp. 1521-1527
-
-
Uernatsu, H.1
Watanabe, R.2
|