A fast fanout optimization algorithm for near-continuous buffer libraries

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 352-355

  Kung, David S ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

OPTIMIZATION; BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; DATABASE SYSTEMS; FORMAL LOGIC;

AREA COST; BUFFER SIZES; COMBINATORIAL SEARCH; FAN-OUT; FANOUT OPTIMIZATION; FANOUT TREE; OPTIMAL ALGORITHM; SIZE INDEPENDENTS;

LIBRARIES; ALGORITHMS;

FAST FANOUT OPTIMIZATION; LOGIC SYNTHESIS; NEAR-CONTINUOUS BUFFER LIBRARIES;

EID: 0031630278     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277143     Document Type: Conference Paper

References (6)

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2. K. J. Singh and A. Sangiovanni-Vincentelli, "A Heuristic Algorithm for the Fanout Problem", Proceedings of the 27th DAC, 1990, pp. 357-360.
3. K. Kodandapani, J. Grodstein, A. Domic and H. Touati, "A Simple Algorithm for Fanout Optimization using High-Performance Buffer Libraries", Proceedings of 1989, pp. 69-99. ICCAD, 1993, pp. 466-471.
4. L. Stok et al. "BooleDozer: Logic synthesis for ASICs", IBM Journal of Research and Development, vol. 40, no. 4, July 1996, pp. 407-430.
5. I. Sutherland and R. Sproul, "The Theory of Logical Effort: Designing for Speed on the Back of an Envelope", Advanced Research in VLSI, Univ. of Calif. Santa Cruz, 1991.
6. K. Shepard et al. "Design Methodology for the S/390 Parallel Enterprise Server G4 microprocessors", IBM J. Res. Development, vol. 41 (1997), pp. 515-547.