Testing for the programming circuit of LUT-based FPGAs

Proceedings of the Asian Test Symposium

Volumn , Issue , 1997, Pages 242-247

  Michinishi, H ^a   Yokohira, T ^a   Okamoto, T ^a   Inoue, T ^a   Fujiwara, H ^a  

^a OKAYAMA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

LOGIC GATES; RANDOM ACCESS STORAGE; SHIFT REGISTERS; TABLE LOOKUP;

LOGIC CIRCUITS;

EID: 0031353808     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. S. D. Brown, R. J. Francis, J. Rose and Z. G. Vranesic, "Field-programmable gate arrays, " Kluwer Academic Publishers, 1992.
2. S. M. Trimberger, "Field-programmable gate array technology, " Kluwer Academic Publishers, 1994.
3. J. V. Oldfield and R. C. Dorf, "Field-programmable gate array technology, " John Wiley & Sons, Inc., 1995.
4. The Programmable Logic Data Book, Xilinx Inc., 1994.
5. I. Pomeranz and S. M .Reddy, "Testability considerations in technology mapping, " Proc. ATS '94, pp. 151-156, Nov. 1994.
6. H. Tsuboi, H.Nakada and T. Miyazaki, "Testing for circuits realized as FPGAs using register insertion method, " Technical report of IEICE, FTS94-53, pp. 55-60, Oct. 1994.
7. T. Inoue, H. Fujiwara, H. Michinishi, T. Yokohira and T. Okamoto, "Universal Test Complexity of Field-Programmable Gate Arrays, " Proc. ATS '95, pp. 259-265, Nov. 1995.
8. H. Michinishi, T. Yokohira, T. Okamoto, T. Inoue and H. Fujiwara, "A Test Methodology for Interconnect Structures of LUT-based FPGAs, " Proc. ATS '96, pp. 68-74, Nov. 1996.
9. D. E. Farmer, "Algorithms for Designing Fault-detection Experiments for Sequential Machines, " IEEE Trans, on Comput., Vol. C-22, No. 2, Feb. 1973.
10. J. M. Berger, "A Note on Error Detecting Codes for Asymmetric Channels, " Inf. Control, Vol.4, pp. 68-73, Mar. 1961.
11. C. V. Frieman, "Optimal Error Detection Codes for Completely Asymmetric Binary Channel, " Inf. Control, Vol. 5, pp. 64-71, Mar. 1962.
12. W. K. Fuchs and J. A. Abraham, "A Unified Approach to Concurrent Error Detection in Highly Structured Logic Arrays, " Proc. FTCS-U, pp. 49, June 1984.