Electrical properties of ferroelectric-capacitor-gate Si MOS transistors using P(L)ZT films

Integrated Ferroelectrics

Volumn 15, Issue 1-4, 1997, Pages 137-144

  Tokumitsu, Eisuke ^a   Shimamura, Toshishige ^a   Ishiwara, Hiroshi ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; COERCIVE FORCE; FERROELECTRICITY; GATES (TRANSISTOR); MOSFET DEVICES;

METAL FERROELECTRIC SEMICONDUCTOR (MFS) FIELD EFFECT TRANSISTORS;

FERROELECTRIC DEVICES;

EID: 0031332824     PISSN: 10584587     EISSN: None     Source Type: Journal    
DOI: 10.1080/10584589708015704     Document Type: Article

References (7)

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2. E. Tokumitsu, K. Itani, B. K. Moon, and H. Ishiwara, Mat. Res. Soc. Symp. Proc., Vol.361 427 (1995)
3. Y. Shichi, S. Tanimoto, T. Goto, K. Kuroiwa, Y. Tarui, Jpn. J. Appl. Phys., 33 5172(1994)
4. D. R. Lampe, D. A. Adams, M. Austin, M. Polinsky, J. Dzimianski, S. Sinharoy, H. Buhay, P. Brabant, and Y. M. Liu, Ferroelectrics, 133 61 (1992)
5. K. Aizawa, T. Ichiki, T. Okamoto, E. Tokumitsu, and H. Ishiwara, Jpn. J. Appl. Phys., 35 (1996) to be published
6. Y. Nakao, T. Nakamura, A. Kamisawa, and H. Takasu, Integrated Ferroelectrics, 6 23 (1995)
7. 2) would be 1/12.8. When +6V is applied to the gate of the MFMISFET as mentioned in the paper, only 0.5 V can be applied to the ferroelectric layer. Hence, a large memory window of 2.7 V reported in the paper can not be explained by the ferroelectric nature alone.