Hot-carrier degradation and oxide charge build-up in self-aligned etched-polysilicon npn bipolar transistors

IEEE Transactions on Electron Devices

Volumn 44, Issue 11, 1997, Pages 2059-2063

  Neviani, Andrea ^a,b   Pavan, Paolo ^a,b   Nardi, Alessandra ^c   Chantre, Alain ^d   Vendrame, Loris ^c   Zanoni, Enrico ^d  

^a IEEE   (Italy)

^b UNIVERSITY OF PADOVA   (Italy)

^c UNIVERSITY OF MODENA AND REGGIO EMILIA   (Italy)

^d ORANGE LABS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC FIELDS; HOT CARRIERS; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE TESTING; SEMICONDUCTOR JUNCTIONS;

HOT CARRIER DEGRADATION; OXIDE CHARGE BUILD UP; REVERSE BIASING; SILICON DIOXIDE EMITTER SPACERS;

BIPOLAR TRANSISTORS;

EID: 0031271099     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.641384     Document Type: Article

References (10)

1. D. Burnett and C. Hu, "Modeling hot carrier effects in poly silicon emitter bipolar transistors," IEEE Trans. Electron Devices, vol. 35, pp. 2238-2244, Dec. 1988.
2. Y. Niitsu, K. Yamaura, H. Momose, and K. Maeguchi, "Anomalous current gain degradation in bipolar transistors," in Proc. IEEE IRPS, 1991 pp. 193-199.
3. F. Maugain, C. Papadas, G. Ghibaudo, N. Gambetta, and P. Mortini, "On the degradation features of poly-emitter npn BJT's after hot carrier injection," in Proc. IEEE 1RPS, pp. 266-270, 1995.
4. D. D.-L. Tang and E. Hackbarth, "Junction degradation in bipolar transistors and the reliability-imposed constraints to scaling and design," IEEE Trans. Electron Devices, vol. 35, pp. 2101-2107, Dec. 1988.
5. G. P. Li, E. Hackbarth, and T.-C. Chan, "Identification and implication of a perimeter tunneling current component in advanced self-aligned bipolar transistors," IEEE Trans. Electron Devices, vol. ED-35, no. 1, pp. 89-95, 1988.
6. H. S. Momose and H. Iwai, "Analysis of the temperature dependence of hot-carrier induced degradation in bipolar transistors for BiCMOS," IEEE Trans. Electron Devices, vol. 41, pp. 978-987, June 1994.
7. A. Chantre, G. Festes, G. Matlakowski, and A. Nouailhat, "An investigation of nonideal base current in advanced self-aligned 'etchedpolysilicon' emitter bipolar transistors," IEEE Trans. Electron Devices, vol. 38, pp. 1354-1361, June 1991.
8. A. Chantre, G. Festes, G. Matlakowski, and A. Nouailhat, "Identification of a corner tunneling current component in an advanced CMOScompatible bipolar transistor," IEEE Trans. Electron Devices, vol. 38, pp. 107-110, Jan. 1991.
9. A. Neviani, P. Pavan, T. Tommasin, A. Nardi, A. Chantre, M. Stucchi, L. Vendrame, and E. Zanoni, "Hot-carrier degradation and oxide charge build-up in self-aligned, etched-polysilicon, npn bipolar transistors, in Proc. of the 26th European Solid State Device Research Conf., Bologna, Italy, Sept. 1996, pp. 979-982.
10. G. Baccarani, R. Guerrieri, P. Ciampolini, and M. Rudan, "HFIELDS: Hybrid Finite ELements Device Simulator," in Proc. NASECODE IV, Dublin, Ireland, June 1985.