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Volumn 33, Issue 4, 1997, Pages 1189-1198

Performance limits for processor networks with divisible jobs

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; TREES (MATHEMATICS);

EID: 0031257525     PISSN: 00189251     EISSN: None     Source Type: Journal    
DOI: 10.1109/7.625112     Document Type: Article
Times cited : (10)

References (36)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.