Dangerous parasitics of socketed CDM ESD testers

Microelectronics Reliability

Volumn 37, Issue 10-11, 1997, Pages 1465-1468

  Gossner, H ^a   Brodbeck, T ^a  

^a SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUITS; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE TESTING; TRANSMISSION LINE THEORY;

CHARGED DEVICE MODEL; HUMAN BODY MODEL; PARASITIC TESTER CAPACITANCE;

ELECTRIC DISCHARGES;

EID: 0031246640     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(97)00088-7     Document Type: Article

References (5)

1. L. R. Avery, Charged Device Model testing trying to duplicate reality, EOS/ESD Symposium Proceedings, pp. 88-92 (1987).
2. A. Olney, A combined socketed and non-socketed CDM test approach for eliminating real-world CDM-failures, EOS/ESD Symposium Proceedings, pp. 62-75 (1996).
3. H. Gieser and P. Egger, Influence of Tester Parasitics on Charged Device Model - Failure Thresholds, EOS/ESD Symposium Proceedings, 69-84 (1994).
4. K. Verhaege, G. Groeseneken, H. Maes, P. Egger and H. Gieser, Influence of Tester, Test Method and Device Parasitics on CDM ESD testing, EOS/ESD Symp. Proc., 49-62 (1994).
5. W. Veit, J. Fenk, S. Ganser, K. Hadjizada, S. Heinen, H. Herrmann and P. Sehrig, A 2.7V 800MHz-2.1GHz transceiver chipset for mobile radio application in 25 GHz ft Si-bipolar, Proc. IEEE 1994 BCTM, Minneapolis, MN, pp. 175-178 (1994).