Low permittivity dielectrics and global planarization for quarter-micron multilevel interconnections

Solid-State Electronics

Volumn 41, Issue 7, 1997, Pages 1005-1011

  Homma, Yoshio ^a   Furusawa, Takeshi ^a   Morishima, Hiroyuki ^a   Sato, Hidetada ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHEMICAL POLISHING; DIELECTRIC MATERIALS; HEAT RESISTANCE; PERMITTIVITY;

CHEMICAL MECHANICAL POLISHING (CMP); GLOBAL PLANARIZATION; INTERLEVEL DIELECTRICS; ORGANIC SPIN ON GLASS (SOG);

ULSI CIRCUITS;

EID: 0031186658     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(97)00014-2     Document Type: Article

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