Single-electron logic device based on the binary decision diagram

IEEE Transactions on Electron Devices

Volumn 44, Issue 7, 1997, Pages 1109-1116

  Asahi, Noboru ^a   Akazawa, Masamichi ^a   Amemiya, Yoshihito ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; NAND CIRCUITS; TUNNEL JUNCTIONS;

BINARY DECISION DIAGRAM; SINGLE-ELECTRON LOGIC DEVICES;

LOGIC DEVICES;

EID: 0031177646     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.595938     Document Type: Article

References (7)

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3. S. B. Akers, "Binary decision diagrams," IEEE Trans. Comput. , vol. C-27, pp. 509-516, June 1978.
4. R. E. Bryant, "Graph-based algorithms for Boolean function manipulation," IEEE Trans. Comput. , vol. C-35, pp. 677-691, Aug. 1986.
5. K. Nakazato, "Single-electron switch for phase-locked single-electron logic devices," in 1EDM Tech. Dig. , 1992, pp. 48790.
6. H. Pothier, P. Lafarge, C. Urbina, D. Esteve, and M. H. Devoret, "Singleelectron pump based on charging effects," Europhys. Lett. , vol. 17, pp. 249-254, 1992.
7. N. Kuwamura, K. Taniguchi, and C. Hamaguchi, "Simulation of singleelectron logic circuits," Trans. IEICE, vol. J77-C-II, no. 5, pp. 221-228, 1994.