An improved NbN integrated circuit process featuring thick NbN ground plane and lower parasitic circuit inductances

IEEE Transactions on Applied Superconductivity

Volumn 7, Issue 2 PART 3, 1997, Pages 2638-2643

  Kerber, G L ^a   Abelson, L A ^a   Elmadjian, R N ^a   Hanaya, G ^a   Ladizinsky, E G ^a  

^a NORTHROP GRUMMAN CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC FORCE MICROSCOPY; CURRENT DENSITY; INDUCTANCE MEASUREMENT; INTEGRATED CIRCUIT MANUFACTURE; REACTIVE ION ETCHING; SILICA; SPUTTER DEPOSITION; SUPERCONDUCTING FILMS; SURFACE PROPERTIES; TUNNEL JUNCTIONS;

INTERLEVEL DIELECTRIC (ILD) DEPOSITION PROCESS; PARASITIC CIRCUIT INDUCTANCE;

SUPERCONDUCTING DEVICES;

EID: 0031165034     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.621781     Document Type: Article

References (14)

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