A 2-V, 1-10 GHz BiCMOS transceiver chip for multimode wireless communications networks

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 4, 1997, Pages 521-524

  Madihian, Mohammad ^a,b   Bak, Emmanuel ^b,c   Yoshida, Hiroshi ^b   Hirabayashi, Hiroshi ^b   Imai, Kyotaka ^b   Kinoshita, Yasushi ^b   Yamazaki, Tohru ^b   Desclos, Laurent ^b  

^a IEEE   (Japan)

^b NEC CORPORATION   (Japan)

^c UPPSALA UNIVERSITY   (Sweden)

Author keywords

BiCMOS; Multimode; Tranceiver; Wireless

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIPOLAR INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; LOCAL AREA NETWORKS; MIXER CIRCUITS; RADIO SYSTEMS; SEMICONDUCTOR DEVICE MODELS; TRANSCEIVERS;

BICMOS TRANSCEIVER CHIP; DC SUPPLY VOLTAGE; DOWNCONVERSION GAIN; MULTIMODE WIRELESS COMMUNICATION NETWORKS; UPCONVERSION GAIN; VOLTAGE DEVIATION;

INTEGRATED CIRCUITS;

EID: 0031118101     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.563673     Document Type: Article

References (7)

1. M. Madihian, K. Imai, H. Yohida, Y. Kinoshita, and T. Yamazaki, "L-C-band low-voltage BiCMOS MMIC's for dual-mode cellular-LAN applications," IEEE Trans. Microwave Theory Technol., vol. 44, pp. 2025-2031, Nov. 1996.
2. P. Karbinis, S. Reinhold, R. Weiss, P. Dent, S. Chenakeshu, and A. Hassan, "Dual-mode cellular/satellite hand-held phone technology," in IEEE Int, Mocrowave Symp. Dig., vol. II. no. WE2D-4, June 1996.
3. V. Thomas, J. Fenk, and S. Beyer, "A one-chip 2 GHz single super-heterodyne receiver for 2 Mbps FSK radio communication," in IEEE ISSCC Dig., Feb. 1994, p. 42.
4. T. Tsukahara et al., "A 2 V 2 GHz Si-bipolar direct-conversion quadrature modulator," in IEEE ISSCC Dig., Feb. 1994, p. 40.
5. C. Takahashi, R. Fujimoto, S. Arai, T. Itakawa, T. Ueno, H. Tsurumi, H. Tanimoto, S. Watanabe, and K. Hirakawa, "A 1.9 GHz Si direct conversion receiver IC for QPSK modulation systems," in IEEE ISSCC Dig., Feb. 1995, p. 138.
6. J. R. Long, M. A. Copeland, P. Schvan, and R. A. Hadaway, "A low-voltage silicon bipolar RF front-end for PCN receiver applications," in IEEE ISSCC Dig., Feb. 1995, p. 140.
7. H. Okamura, H. Toyoshima, K. Takeda, T. Oguri, S. Nakamura, M. Takada, K. Imai, Y. Kinoshita, H. Yoshida, and T. Yamazaki, "A 1 ns, 1 W, 2.5 V, 32 kb NTL-CMOS SRAM macro using a memory cell with P-channel access transistors," in IEEE ISSCC Dig., Feb. 1995, pp. 306-307.