A high-speed, low-power bipolar digital circuit for Gb/s LSI's: Current mirror control logic

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 2, 1997, Pages 215-221

  Kishine, Keiji ^b,c,d   Kobayashi, Yoshiji ^b,e,f,g   Ichino, Haruhiko ^a,b,h  

^a IEEE

^b NTT CORPORATION   (Japan)

^c KYOTO UNIVERSITY   (Japan)

^d National Laboratory for High Energy Physics   (Japan)

^e TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^f Inst Electronics Info Commun E   (Japan)

^g JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^h OSAKA UNIVERSITY   (Japan)

Author keywords

Bipolar; CMCL; Current mirror; Digital; High speed; Low power; Low voltage

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; ELECTRIC CURRENT CONTROL; ELECTRIC LOSSES; EMITTER COUPLED LOGIC CIRCUITS; GATES (TRANSISTOR); VOLTAGE CONTROL;

CURRENT MIRROR CONTROL LOGIC (CMCL);

LSI CIRCUITS;

EID: 0031075777     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.551913     Document Type: Article

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