A CMOS analog neuro-chip with stochastic learning and multilevel weight storage

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1997-January, Issue , 1997, Pages 1844-1847

  Conti, Massimo ^a   Guaitini, Giovanni ^b   Turchetti, Claudio ^a  

^a UNIVERSITÀ POLITECNICA DELLE MARCHE   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

LEARNING ALGORITHMS; PULSE ANALYZING CIRCUITS; RANDOM ACCESS STORAGE; RECONFIGURABLE HARDWARE; STOCHASTIC SYSTEMS; NEURAL NETWORKS; RANDOM PROCESSES; SPURIOUS SIGNAL NOISE; VECTORS;

CMOS ANALOG; CMOS TECHNOLOGY; INPUT VECTOR; MULTILEVEL STORAGE; NEURO-CHIPS; NOISE SOURCE; RANDOM WEIGHT; STOCHASTIC LEARNING;

CMOS INTEGRATED CIRCUITS;

CMOS ANALOG NEURO CHIP; MULTILEVEL WEIGHT STORAGE;

EID: 0030700945     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.1997.621507     Document Type: Conference Paper

References (4)

1. M. Conti, G. Guaitini, and C. Turchetti "An Analog VLSI Neural with On-Chip Learning and Multilevel Weight Storage", Proc. of ICANN 96, Bochum, Germany, pp. 761-766.
2. M. R. Belli, M. Conti, C. Turchetti, "Analog Brownian Weight Movement for Learning of Artificial Neural Networks", ESANN 95, Bruxelles, April 19-21, 1995.
3. J. Alspector et al., "A VLSI-Efficient Technique for Generating Nultiple Uncorrelated Noise Sources and Its Application to Stochastic Neural Networks", IEEE Trans. on CAS, Vol. 38, No. 1, Jan. 1991, pp. 109-123.
4. M. Conti, S. Orcioni, C. Turchetti, "A Class of Neural Networks Based on Approximate Identity for Analog IC's Implementation", IEICE Trans. on Fundamentals, Japan, Vol. E77-A, No. 6, June 1994, pp. 1069-1079.