New Interconnect Plasma Induced Damage analyzed by Flash Memory Cell Array

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1996, Pages 185-188

  Takebuchi, M ^a   Yamada, K ^a   Nishimura, T ^a   Isobe, K ^a   Uemura, T ^a   Fujimoto, T ^a   Arakawa, M ^b   Mori, S ^c   Kimitsuka, A ^a   Yoshikawa, K ^a  

^a System LSI Division   (Japan)

^b Semiconductor System Engineering Center   (Japan)

^c ULSI Device Laboratory   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

LEAKAGE CURRENTS; MEMORY ARCHITECTURE; SEMICONDUCTOR STORAGE; ELECTRON TRANSPORT PROPERTIES; REACTIVE ION ETCHING; SEMICONDUCTOR PLASMAS;

CHARGE TRANSPORT MECHANISMS; FLASH MEMORY CELL; KEY PROCESS; LOW-LEAKAGE CURRENT; MEMORY CELL ARRAYS; PLASMA DAMAGE; PLASMA INDUCED DAMAGE; PLASMA PROCESS; THERMAL EMISSIONS; ULTRA LOW LEAKAGES;

FLASH MEMORY; NONVOLATILE STORAGE;

FIELD EMISSION; FLASH MEMORY CELL ARRAY; INTERCONNECT PLASMA PROCESSES; RESIST ASHING PROCESSES; THERMAL EMISSION;

EID: 0030409319     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.1996.553150     Document Type: Conference Paper

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