Comparisons and extension of recent surface potential models for fully depleted short-channel SOI MOSFET's

IEEE Transactions on Electron Devices

Volumn 43, Issue 11, 1996, Pages 2034-2037

  Niu, G F ^a   Chen, R M M ^a   Ruan, G ^a  

^a CITY UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FIELD EFFECTS; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; SURFACE PROPERTIES;

SHORT CHANNEL EFFECTS; SURFACE POTENTIAL;

MOSFET DEVICES;

EID: 0030291307     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.543048     Document Type: Article

References (14)

1. J. P. Colinge Silicon-On-Insulator Technology: Materials to VLSI. 1990 Kluwer MA, Norwell
2. J. Woo K. Terrill P. K. Vasudev Two-dimensional analytic modeling of very thin SOI MOSFET's IEEE Trans. Electron Devices 37 9 1999 2006 1990 16 2071 57162
3. K. K. Young Short-channel effect in fully depleted SOI MOSFET's IEEE Trans. Electron Devices 36 2 399 402 1989 16 789 19942
4. H. O. Joachim Y. Yamaguchi K. Ishikawa Y. Inoue T. Nishimura Simulation and two-dimensional analytical modeling of subthreshold slope in ultrathin-film SOI MOSFET's down to 0.1 $\mu$ m gate length IEEE Trans. Electron Devices 40 10 1812 1817 1993 16 6849 277338
5. P. C. Yeh J. G. Fossum Physical subthreshold MOSFET modeling applied to viable design of deep-submicrometer fully depleted SOI low-voltage CMOS technology IEEE Trans. Electron Devices 42 9 1605 1613 1995 16 9118 405274
6. K. Suzuki T. Sugii Analytical models for ${\hbox{{n}}}^+$- ${\hbox{{p}}}^+$ double-gate SOI MOSFET's IEEE Trans. Electron Devices 42 11 1940 1948 1995 16 9898 469401
7. L. T. Su J. B. Jacobs J. E. Chung D. A. Antoniadis Deep-submicrometer channel design in Silicon-On-Insulator (SOI) MOSFET's IEEE Electron Device Lett. 15 5 183 185 1995 55 7219 291592
8. Z. H. Liu C. Hu J. H. Huang T. Y. Chan M. C. Jeng P. K. Ko Y. C. Cheng Threshold voltage model for deep-submicrometer MOSFET's IEEE Trans. Electron Devices 40 1 86 95 1993 16 6383 249429
9. G. F. Niu G. Ruan Punchthrough path in double-gate SOI MOSFET's Solid State Electron. 38 10 1848 1850 1995
10. J. Y. Guo C. Y. Wu A new 2-D analytic threshold-voltage model for fully depleted short-channel SOI MOSFET's IEEE Trans. Electron Devices 40 9 1653 1661 1993 16 5987 231571
11. R. H. Yan A. Ourmazd K. F. Lee Scaling the Si MOSFET: From bulk to SOI to bulk IEEE Trans. Electron Devices 39 7 1704 1710 1992 16 3789 141237
12. K. Suzuki Y. Tosaka T. Tanaka H. Horie Y. Arimoto Scaling theory for double-gate SOI MOSFET's IEEE Trans. Electron Devices 40 12 2326 2329 1993 16 6384 249482
13. S. R. Banna P. C. Chan P. K. Ko C. T. Nguyen M. Chan Threshold voltage model for deep-submicrometer fully depleted SOI MOSFET's IEEE Trans. Electron Devices 42 11 1949 1954 1995 16 9898 469402
14. S. Biesemans S. Kubicek K. Meyer New current-defined threshold voltage model from 2-D potential distribution calculations in MOSFET's Solid State Electron. 39 1 43 48 1996