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Volumn 118, Issue 3, 1996, Pages 114-121

Prediction of solder joint geometries in array-type interconnects

Author keywords

[No Author keywords available]

Indexed keywords

GEOMETRY; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; RELIABILITY; SURFACE TENSION; SURFACES; THERMAL CYCLING;

EID: 0030230333     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.2792140     Document Type: Article
Times cited : (75)

References (26)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.