Cryogenic operation of power bipolar transistors

Solid-State Electronics

Volumn 39, Issue 1, 1996, Pages 101-108

  Singh, Ranbir ^a   Baliga, B J ^a  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CRYOGENICS; ELECTRIC BREAKDOWN OF SOLIDS; ELECTRIC CURRENTS; ELECTRIC VARIABLES MEASUREMENT; GAIN MEASUREMENT; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING;

BIPOLAR JUNCTION TRANSISTORS; CRYOGENIC OPERATION; CURRENT GAIN; EMITTER CURRENT CROWDING; ON-STATE COLLECTOR EMITTER; OPTIMIZED STRUCTURE;

BIPOLAR TRANSISTORS;

EID: 0029754147     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00113-8     Document Type: Article

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