Novel Viterbi Decoder VLSI Implementation and its Performance

IEEE Transactions on Communications

Volumn 41, Issue 8, 1993, Pages 1170-1178

  Kubota, Shuji ^a   Kato, Shuzo ^a   Ishitani, Tsunehachi ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; ERROR CORRECTION; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; ROM; SIGNAL ENCODING; SIGNAL INTERFERENCE; STATE ASSIGNMENT; TABLE LOOKUP; VLSI CIRCUITS;

ADJACENT/COCHANNEL INTERFERENCE; FORWARD ERROR CORRECTION SCHEMES; VITERBI DECODERS;

RADIO COMMUNICATION;

EID: 0027641448     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/26.231960     Document Type: Article

References (13)

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