VLSI R equals 1/2, K equals 7 VITERBI DECODER.

IEEE Proceedings of the National Aerospace and Electronics Conference

Volumn 1, Issue , 1984, Pages 20-27

  Cain, J Bibb ^a   Kriete, Rob A ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

CMOS VLSI IMPLEMENTATION; CONVOLUTIONAL CODING; PARAMETRIC MACRO CELLS; PMC; VITERBI ALGORITHM; VLSI VITERBI DECODER;

CODES, SYMBOLIC;

EID: 0021291481     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)