On the Profile Design and Optimization of Epitaxial Si and SiGe-Base Bipolar Technology for 77 K Applications—Part I: Transistor DC Design Considerations

IEEE Transactions on Electron Devices

Volumn 40, Issue 3, 1993, Pages 525-541

  Cressler, John D ^a   Comfort, James H ^b   Crabbe, Emmanuel F ^b   Patton, Gary L ^b   Stork, Johannes M ^b   Sun, Jack Y C ^b   Meyerson, Bernard S ^b  

^a AUBURN UNIVERSITY   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EPITAXIAL GROWTH; HETEROJUNCTIONS; LOGIC CIRCUITS; NETWORKS (CIRCUITS); SEMICONDUCTING GERMANIUM; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR GROWTH;

HETEROJUNCTION BARRIER EFFECTS; SILICON BIPOLAR TRANSISTORS; SILICON-GERMANIUM BIPOLAR TRANSISTORS;

BIPOLAR TRANSISTORS;

EID: 0027556076     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.199358     Document Type: Article

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