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Volumn 39, Issue 12, 1992, Pages 2758-2764

Characteristics of a New Isolated p-Well Structure Using Thin Epitaxy Over the Buried Layer and Isolation Trench

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; EPITAXIAL GROWTH; THIN FILM CIRCUITS;

EID: 0026979128     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.168730     Document Type: Article
Times cited : (20)

References (18)
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    • Subquarter-micrometer gate-length p-channel and n-channel MOSFET's with extremely shallow source-drain junctions
    • M. Miyake, T. Kobayashi, and Y. Okazaki, “Subquarter-micrometer gate-length p-channel and n-channel MOSFET's with extremely shallow source-drain junctions,” IEEE Trans. Electron Devices, vol. 36, p. 392, 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , pp. 392
    • Miyake, M.1    Kobayashi, T.2    Okazaki, Y.3
  • 10
    • 0024608379 scopus 로고
    • Feasibility of high-energy boron implantation for p-type retrograde well formation
    • K. Ohyu, T. Suzuki, T. Yamanaka, and N. Natsuaki, “Feasibility of high-energy boron implantation for p-type retrograde well formation,” Nucl. Instrum. andMeth., vol. B37/38, p. 749, 1989.
    • (1989) Nucl. Instrum. andMeth. , vol.B37/38 , pp. 749
    • Ohyu, K.1    Suzuki, T.2    Yamanaka, T.3    Natsuaki, N.4
  • 12
    • 0020828727 scopus 로고
    • MeV-energy As+ implantation into Si: Extended-defect reduction and planar n-p-n transistor fabrication
    • M. Takahashi, S. Konaka, and K. Kajiyama, “MeV-energy As+ implantation into Si: Extended-defect reduction and planar n-p-n transistor fabrication,” J. Appl. Phys., vol. 54, p. 6041, 1983.
    • (1983) J. Appl. Phys. , vol.54 , pp. 6041
    • Takahashi, M.1    Konaka, S.2    Kajiyama, K.3
  • 14
    • 0015770573 scopus 로고
    • latchup in CMOS integrated circuits
    • B. L. Gregory and B. D. Shafer, “latchup in CMOS integrated circuits,” IEEE Trans. Nucl. Sci., vol. NS-20, p. 293, 1973.
    • (1973) IEEE Trans. Nucl. Sci. , vol.NS-20 , pp. 293
    • Gregory, B.L.1    Shafer, B.D.2
  • 15
    • 0021204461 scopus 로고
    • A better understanding of CMOS latchup
    • G. J. Hu, “A better understanding of CMOS latchup,” IEEE Trans. Electron Devices, vol. ED-31, p. 62, 1984.
    • (1984) IEEE Trans. Electron Devices , vol.ED-31 , pp. 62
    • Hu, G.J.1
  • 17
    • 0024172243 scopus 로고
    • A new static memory cell based on reverse base current (RBC) effect of bipolar transistor
    • K. Sakui, T. Hasegawa, T. Fuse, S. Watanabe, K. Ohuchi, and F. Masuoka, “A new static memory cell based on reverse base current (RBC) effect of bipolar transistor,” in IEDM Tech. Dig., 1989, p. 44.
    • (1989) IEDM Tech. Dig. , pp. 44
    • Sakui, K.1    Hasegawa, T.2    Fuse, T.3    Watanabe, S.4    Ohuchi, K.5    Masuoka, F.6
  • 18
    • 0025495106 scopus 로고
    • 3.2 GHz, 0.2 03BC m Gate CMOS 1/8 dynamic frequency divider
    • Y. Kado, Y. Okazaki, M. Suzuki, and T. Kobayashi, “3.2 GHz, 0.2 03BC m Gate CMOS 1/8 dynamic frequency divider,” Electron. Lett., vol. 26, p. 1684, 1990.
    • (1990) Electron. Lett. , vol.26 , pp. 1684
    • Kado, Y.1    Okazaki, Y.2    Suzuki, M.3    Kobayashi, T.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.