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IEEE Journal of Solid-State Circuits

Volumn 19, Issue 6, 1984, Pages 813-819

A Self-Calibrating 15 Bit CMOS A/D Converter

(3) Lee, Hae Seung a Hodges, David A b Gray, Paul R b

a MASSACHUSETTS INSTITUTE OF TECHNOLOGY (United States)

b UNIVERSITY OF CALIFORNIA (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; LOGIC DEVICES - GATES; RESISTORS; SEMICONDUCTOR DEVICES, MOS;

BINARY WEIGHTED CAPACITORS; RESISTOR STRINGS;

DATA CONVERSION, ANALOG TO DIGITAL;

EID: 0021616937 PISSN: 00189200 EISSN: 1558173X Source Type: Journal
DOI: 10.1109/JSSC.1984.1052231 Document Type: Article

Times cited : (230)

References (9)

1
- 0016620207
- All MOS charge redistribution analog-to-digital conversion techniques—Part I
- Dec.
- J. L. McCreary and P. R. Gray, “All MOS charge redistribution analog-to-digital conversion techniques—Part I,” IEEE J. Solid-State Circuits, vol. SC-10, pp. 371–379, Dec. 1975.
- (1975) IEEE J. Solid-State Circuits , vol.SC-10 , pp. 371-379
- McCreary, J.L.¹ Gray, P.R.²

2
- 0018056639
- A single chip all-MOS 8-bit A/D converter
- Dec.
- A. R. Hamade, “A single chip all-MOS 8-bit A/D converter/ IEEE J. Solid-State Circuits, vol. SC-13, 785–791, Dec. 1978.
- (1978) IEEE J. Solid-State Circuits, vol. , vol.SC-13 , pp. 785-791
- Hamade, A.R.¹

3
- 84944990177
- Weighted capacitor analog/digital converting apparatus and method
- U.S. Patent 4129863, Oct.
- P. R. Gray, J. L. McCreary, and D. A. Hodges, “Weighted capacitor analog/digital converting apparatus and method/ U.S. Patent 4129863, Oct. 1977.
- (1977)
- Gray, P.R.¹ McCreary, J.L.² Hodges, D.A.³

4
- 84944990178
- Weighted capacitor analog digital converting apparatus and method
- U. S, Patent 4200863, Dec.
- D. A. Hodges, P. R. Gray, and J. L. McCreary, “Weighted capacitor analog digital converting apparatus and method,” U.S, Patent 4200863, Dec. 1978.
- (1978)
- Hodges, D.A.¹ Gray, P.R.² McCreary, J.L.³

5
- 0020720035
- Self-calibration technique for A/D converters
- Mar.
- H. S. Lee and D. A, Hodges, “Self-calibration technique for A/D converters,” IEEE Trans. Circuits Syst., vol. CAS-30, pp. 188–190, Mar. 1983.
- (1983) IEEE Trans. Circuits Syst. , vol.CAS-30 , pp. 188-190
- Lee, H.S.¹ Hodges, D.A.²

6
- 0016333057
- Relationship between frequency response and settling time of operational amplifiers
- Dec.
- B. Y. Kamath, R. G. Meyer, and P. R. Gray, “Relationship between frequency response and settling time of operational amplifiers,” IEEE.J. Solid-State Circuits, vol. SC-9,pp. 347-352,. Dec. 1974.
- (1974) IEEE.J. Solid-State Circuits , vol.SC-9 , pp. 347-352
- Kamath, B.Y.¹ Meyer, R.G.² Gray, P.R.³

7
- 84944990179
- Accuracy consideration in self-calibrating A/D converters
- H. S. Lee and D. A. Hodges, “Accuracy consideration in self-calibrating A/D converters,” submitted to IEEE Trans. Circuits Syst.
- IEEE Trans. Circuits Syst.
- Lee, H.S.¹ Hodges, D.A.²

8
- 0019698649
- Matching properties, and voltage and temperature dependence of MOS capacitors
- Dec.
- J. L, McCreary, “Matching properties, and voltage and temperature dependence of MOS capacitors,”IEEE J. Solid-State Circuits, vol. SC-16, pp. 608–616, Dec. 1981.
- (1981) IEEE J. Solid-State Circuits , vol.SC-16 , pp. 608-616
- McCreary, J.L.¹

9
- 0021586344
- Full-speed testing of A/D converters
- this issue
- J. Doernberg, H.-S. Lee, and D. A. Hodges, “Full-speed testing of A/D converters,” IEEE J. Solid-State Circuits, this issue, pp. 820–827.
- IEEE J. Solid-State Circuits , pp. 820-827
- Doernberg, J.¹ Lee, H.-S.² Hodges, D.A.³

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.