Achieving high performance via co-designed virtual machines

Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems

Volumn , Issue , 1998, Pages 77-84

  Smith, J E ^a   Heil, Timothy ^a   Sastry, Subramanya ^b   Bezenek, Todd M ^b  

^a University of Wisconsin Madison   (United States)

^b University of Wisconsin Madison   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; FEEDBACK; HARDWARE; HARDWARE-SOFTWARE CODESIGN; NETWORK SECURITY; PROGRAM PROCESSORS;

DYNAMIC INSTRUCTIONS; HARDWARE AND SOFTWARE; HARDWARE PERFORMANCE; INSTRUCTION LEVEL PARALLELISM; INSTRUCTION SET ARCHITECTURE; MICRO ARCHITECTURES; PERFORMANCE FEEDBACK; PERFORMANCE OPTIMIZATIONS;

VIRTUAL MACHINE;

EID: 0013002882     PISSN: 15373223     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWIA.1998.779076     Document Type: Conference Paper

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