A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement

Journal of Parallel and Distributed Computing

Volumn 57, Issue 1, 1999, Pages 64-90

  Chandy, John A ^a   Banerjee, Prithviraj ^b  

^a Sierra Vista Research   (United States)

^b NORTHWESTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0011775790     PISSN: 07437315     EISSN: None     Source Type: Journal    
DOI: 10.1006/jpdc.1998.1523     Document Type: Article

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