Analog VLSI design of multi-phase voltage doublers with frequency regulation

1999 Southwest Symposium on Mixed-Signal Design, SSMSD 1999

Volumn , Issue , 1999, Pages 9-14

  Qiu, Fengjing ^a   Starzyk, Janusz A ^a   Jan, Ying Wei ^a  

^a OHIO UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP CIRCUITS; CLOCKS; INTEGRATED CIRCUIT DESIGN; VLSI CIRCUITS;

FREQUENCY REGULATIONS; FREQUENCY REGULATOR; INPUT AND OUTPUTS; MULTI-PHASE VOLTAGE DOUBLERS; OUTPUT VOLTAGES; POWER EFFICIENCY; PUMPING PROCESS; SWITCHED CAPACITOR;

CAPACITANCE;

EID: 0010511380     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SSMSD.1999.768582     Document Type: Conference Paper

References (7)

1. [ 11 J. K. Dickson, "On-chip high voltage generation in NMOS integrated circuits using an improved voltage multiplier technique", IEEE J. Solid-state Circuits, Vol., SC-11, pp. 374-378, June 1976.
2. Y. W. Jan, A Switched-capacitor Analysis of MOS Circuit Simulator: SAMOC, Doctoral Dissertation, 1999, Ohio University, Athens, Ohio.
3. M. S. Makowski, "Realizability Conditions and Bounds on Synthesis of Switched-Capacitor DC-DC Voltage Multiplier Circuits", IEEE Trans. on Circuits and Systems-1: Fundamental Theory and Applications, Vol. 44 NO. 8. , pp. 684-691, August 1997.
4. Mentor Graphcs Corp. http:www.mentorg.com.
5. The MOSIS Service Information Sciences Institute, University of Southern California 4676 Admiralty Way, Marina del Rey CA 90292-6695.
6. J. A. Starzyk and Y.W. Jan, "A DC-DC Charge Pump Based on Voltage Doublers", submitted to IEEE Trans. Circuits and Systems. Part I.
7. C. C. Wang and J. C. Wu, "Efficiency Improvement in Charge h p Cir cuits " IEEE J. Solid-State Circuits, Vol. 32. No. 6, pp. 852-860, June 1996.