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Volumn , Issue , 2000, Pages 341-346

An application-tailored dynamically reconfigurable hardware architecture for digital baseband processing

Author keywords

3G mobile communication; Application specific integrated circuits; Baseband; Computer architecture; Digital signal processing; Energy consumption; Hardware; Microcontrollers; Mobile communication; Very large scale integration

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DIGITAL INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ENERGY UTILIZATION; HARDWARE; INTEGRATED CIRCUITS; MICROCONTROLLERS; MOBILE TELECOMMUNICATION SYSTEMS; RADIO BROADCASTING; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; SIGNAL PROCESSING; SIGNAL RECEIVERS; SYSTEMS ANALYSIS; VLSI CIRCUITS;

EID: 0009929820     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2000.876052     Document Type: Conference Paper
Times cited : (9)

References (11)
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  • 2
    • 50249160177 scopus 로고    scopus 로고
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    • 8th International Workshop On Field Programmable Logic And Applications, FPL'98, Tallinn, Estonia, August 31- September 3, 1998, Springer Press
    • J. Becker, A. Kirschbaum, F.-M. Renner, M. Glesner: Perspectives of Reconfigurable Computing in Research, Industry and Education, 8th International Workshop On Field Programmable Logic And Applications, FPL'98, Tallinn, Estonia, August 31- September 3, 1998, Lecture Notes in Computer Science, Springer Press, 1998
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  • 4
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  • 9
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    • Implementing a RAKE Receiver for Wireless Communications on an FPGA-based Computer System
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.