A new single-clock flip-flop for half-swing clocking

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 1999-January, Issue , 1999, Pages 117-120

  Kwon, Young Su ^a   Park, Bong Il ^a   Park, In Cheol ^a   Kyung, Chong Min ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; COMPUTER AIDED DESIGN; COMPUTER CIRCUITS;

ADDITIONAL LOGIC; CHIP POWER; CLOCK NETWORK; CONVENTIONAL SCHEMES; LEVEL CONVERTER; POWER CONSUMED; SINGLE CLOCK;

FLIP FLOP CIRCUITS;

EID: 0008540787     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.1999.759727     Document Type: Conference Paper

References (8)

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