Fabrication of 40-150 nm gate length ultrathin n-MOSFETs using epitaxial layer transfer SOI wafers

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 38, Issue 4 B, 1999, Pages 2492-2495

  Ishii, Kenichi ^a   Suzuki, Eiichi ^a   Kanemaru, Seigo ^a   Maeda, Tatsuro ^a   Tsutsumi, Toshiyuki ^a   Nagai, Kiyoko ^a   Sekigawa, Toshihiro ^a   Hiroshima, Hiroshi ^a  

^a ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

EB lithography; Short channel effect; SOI; Threshold voltage roll off

Indexed keywords

EID: 0008087533     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.38.2492     Document Type: Article

References (9)

1. T. Sekigawa and Y. Hayashi: Solid-State Electron. 27 (1984) 827.
2. R. H. Yan, A. Ourmazd and K. F. Lee: IEEE Trans. Electron Devices ED39 (1992) 1704.
3. D. Frank, S. E. Laux and M. V. Fischetti: Int. Electron Devices Meet. Tech. Dig. (1992) p. 553.
4. M. Ono, M. Saito, T. Yoshitomi, C. Fiegna, T. Ohguro and H. Iwai: Int. Electron Devices Meet. Tech. Dig. (1993) p. 119.
5. H. Kawamura, T. Sakamoto, T. Baba, Y. Ochiai, J. Fujita, S. Matsui and J. Sone: Ext. Abst. 1996 Int. Conf. Solid State Devices & Materials (Business Center for Academic Societies Japan, Tokyo 1996) p. 22.
6. F. Assaderaghi, W. Rausch, A. Ajmera, E. Leobandung, D. Schepis, L. Wagner, H.- J. Wann, R. Bolam, D. Yee, B. Davari and G. Shahidi: Int. Electron Devices Meet. Tech. Dig. (1997) p. 415.
7. Y. Omura, K. Kurihara, Y. Takahashi, T. Ishiyama, Y. Nakajima and K. Izumi: IEEE Electron Device Lett. 18 (1997) 190.
8. T. Yonehara, K. Sakaguchi and N. Sato: Appl. Phys. Lett. 64 (1994) 2108.
9. S. T. Hsu: RCA Rev. 44 (1983) 424.