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Volumn 1304, Issue , 1997, Pages 141-150
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Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement
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Author keywords
[No Author keywords available]
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Indexed keywords
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EID: 0006845990
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/3-540-63465-7_219 Document Type: Conference Paper |
Times cited : (29)
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References (14)
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