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Volumn 3021, Issue , 1997, Pages 78-87

A parallel DSP architecture for object-based video signal processing

Author keywords

Associative controlling; DSP; MPEG 4; Object based processing; Parallel processing; Video signal processing

Indexed keywords

ASSOCIATIVE PROCESSING; DIGITAL SIGNAL PROCESSING; MOTION PICTURE EXPERTS GROUP STANDARDS; PARALLEL ARCHITECTURES; VIDEO RECORDING;

EID: 84940113317     PISSN: 0277786X     EISSN: 1996756X     Source Type: Conference Proceeding    
DOI: 10.1117/12.263528     Document Type: Conference Paper
Times cited : (2)

References (11)
  • 1
    • 84865927937 scopus 로고
    • Video codec for audiovisual services at p x 64 kbits
    • ITU-T Recommendation H.261, March
    • ITU-T Recommendation H.261, "Video Codec for audiovisual Services at p x 64 kbits", International Telecommunication Union, March 1993
    • (1993) International Telecommunication Union
  • 2
    • 33646691321 scopus 로고
    • Video coding for low bit rate communication
    • Draft ITU-T Recommendation H.263, Dec
    • Draft ITU-T Recommendation H.263, "Video Coding for Low Bit Rate Communication", International Telecommunication Union, Dec. 1995
    • (1995) International Telecommunication Union
  • 3
    • 85076342019 scopus 로고    scopus 로고
    • ISO/IEC JTC1/SC2/WG11 MPEG-90/176 Rev. 2, 1990
    • ISO/IEC JTC1/SC2/WG11 MPEG-90/176 Rev. 2, 1990.
  • 4
    • 85076361100 scopus 로고    scopus 로고
    • ISO/IEC JTC1/SC29/WG11 CD 13818-2, 1994
    • ISO/IEC JTC1/SC29/WG11 CD 13818-2, 1994.
  • 6
    • 0028445643 scopus 로고
    • Object-based analysis-synthesis coding of image sequences at very low bit rates
    • June
    • P. Gerken, "Object-based analysis-synthesis coding of image sequences at very low bit rates", IEEE Trans. on Circuits and Systems for Video Technology, Vol. 4, pp. 228-235, June 1994.
    • (1994) IEEE Trans. On Circuits and Systems for Video Technology , vol.4 , pp. 228-235
    • Gerken, P.1
  • 8
    • 0027574931 scopus 로고
    • A VLSI based mimd architecture of a multiprocessor system for real-time video processing applications
    • Kluwer Academic Publishers, Boston, April
    • K. Gaedke, H. Jeschke, P. Pirsch, "A VLSI Based MIMD Architecture of a Multiprocessor System for Real-Time Video Processing Applications", Journal of VLSI Signal Processing, Volume 5, Nr. 2/3, Kluwer Academic Publishers, pp. 47-57, Boston, April 1993.
    • (1993) Journal of VLSI Signal Processing , vol.5 , Issue.2-3 , pp. 47-57
    • Gaedke, K.1    Jeschke, H.2    Pirsch, P.3
  • 9
    • 0028735726 scopus 로고
    • A single-chip highly parallel architecture for image processing applications
    • Chicago
    • J. Kneip, K. Ronner, P. Pirsch, "A Single-Chip Highly Parallel Architecture for Image Processing Applications", SPIE VCIP, pp. 1753-1764, Chicago, 1994
    • (1994) SPIE VCIP , pp. 1753-1764
    • Kneip, J.1    Ronner, K.2    Pirsch, P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.